Datasheet

PIC18CXX2
DS39026D-page 248  1999-2013 Microchip Technology Inc.
FIGURE 21-7: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
FIGURE 21-8: BROWN-OUT RESET TIMING
TABLE 21-7: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET REQUIREMENTS
Param.
No.
Symbol Characteristic Min Typ Max Units Conditions
30 TmcL MCLR
Pulse Width (low) 2 — — s
31 T
WDT Watchdog Timer Time-out Period
(No Postscaler)
71833ms
32 T
OST Oscillation Start-up Timer Period 1024TOSC — 1024TOSC —TOSC = OSC1 period
33 TPWRT Power up Timer Period 28 72 132 ms
34 T
IOZ I/O Hi-impedance from MCLR
Low or Watchdog Timer Reset
—2—s
35 T
BOR Brown-out Reset Pulse Width 200 — — sVDD  BVDD (See D005)
36 Tivrst Time for Internal Reference
Voltage to become stable
—2050 s
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Time-out
Internal
Reset
Watchdog
Timer
Reset
33
32
30
31
34
I/O Pins
34
Note: Refer to Figure 21-4 for load conditions.
VDD
BVDD
35
VBGAP = 1.2V
V
IRVST
Enable Internal Reference Voltage
Internal Reference Voltage Stable
36