Datasheet

PIC18CXX2
DS39026D-page 222  1999-2013 Microchip Technology Inc.
SLEEP Enter SLEEP mode
Syntax: [ label ] SLEEP
Operands: None
Operation: 00h  WDT,
0  WDT postscaler,
1  TO
,
0  PD
Status Affected: TO, PD
Encoding:
0000 0000 0000 0011
Description: The power-down status bit (PD) is
cleared. The time-out status bit
(TO
) is set. Watchdog Timer and
its postscaler are cleared.
The processor is put into SLEEP
mode with the oscillator stopped.
Words: 1
Cycles: 1
Q Cycle Activity:
Q1 Q2 Q3 Q4
Decode No
operation
Process
Data
Go to
sleep
Example:
SLEEP
Before Instruction
TO =?
PD
=?
After Instruction
TO =1 †
PD
=0
† If WDT causes wake-up, this bit is cleared.
SUBFWB Subtract f from WREG with borrow
Syntax: [ label ] SUBFWB f [,d [,a]
Operands: 0 f 255
d  [0,1]
a  [0,1]
Operation: (WREG) – (f) – (C
) dest
Status Affected: N,OV, C, DC, Z
Encoding:
0101 01da ffff ffff
Description: Subtract register 'f' and carry flag
(borrow) from WREG (2’s comple-
ment method). If 'd' is 0, the result is
stored in WREG. If 'd' is 1, the result
is stored in register 'f' (default). If ’a’ is
0, the Access Bank will be selected,
overriding the BSR value. If ’a’ is 1,
then the bank will be selected as per
the BSR value (default).
Words: 1
Cycles: 1
Q Cycle Activity:
Q1 Q2 Q3 Q4
Decode Read
register 'f'
Process
Data
Write to
destination
Example 1:
SUBFWB REG, 1, 0
Before Instruction
REG = 3
WREG = 2
C=1
After Instruction
REG = FF
WREG = 2
C=0
Z=0
N = 1 ; result is negative
Example 2:
SUBFWB REG, 0, 0
Before Instruction
REG = 2
WREG = 5
C=1
After Instruction
REG = 2
WREG = 3
C=1
Z=0
N = 0 ; result is positive
Example 3:
SUBFWB REG, 1, 0
Before Instruction
REG = 1
WREG = 2
C=0
After Instruction
REG = 0
WREG = 2
C=1
Z = 1 ; result is zero
N=0