Datasheet
PIC18CXX2
DS39026D-page 172 1999-2013 Microchip Technology Inc.
TABLE 16-3: SUMMARY OF A/D REGISTERS
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on all
other
RESETS
INTCON
GIE/
GIEH
PEIE/
GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u
PIR1
PSPIF
(1)
ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
PIE1
PSPIE
(1)
ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
IPR1
PSPIP
(1)
ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 0000 0000 0000 0000
PIR2
— — — — BCLIF LVDIF TMR3IF CCP2IF ---- 0000 ---- 0000
PIE2
— — — — BCLIE LVDIE TMR3IE CCP2IE ---- 0000 ---- 0000
IPR2
— — — — BCLIP LVDIP TMR3IP CCP2IP ---- 0000 ---- 0000
ADRESH A/D Result Register xxxx xxxx uuuu uuuu
ADRESL A/D Result Register xxxx xxxx uuuu uuuu
ADCON0 ADCS1 ADCS0 CHS2 CHS1 CHS0 GO/
DONE
—ADON0000 00-0 0000 00-0
ADCON1 ADFM ADCS2
— — PCFG3 PCFG2 PCFG1 PCFG0 ---- -000 ---- -000
PORTA
— RA6 RA5 RA4 RA3 RA2 RA1 RA0 --0x 0000 --0u 0000
TRISA
— PORTA Data Direction Register --11 1111 --11 1111
PORTE
— — — — —RE2RE1RE0---- -000 ---- -000
LATE
— — — — — LATE2 LATE1 LATE0 ---- -xxx ---- -uuu
TRISE
IBF OBF IBOV PSPMODE — PORTE Data Direction bits 0000 -111 0000 -111
Legend: x = unknown, u = unchanged, — = unimplemented, read as '0'. Shaded cells are not used for A/D conversion.
Note 1: The PSPIF, PSPIE and PSPIP bits are reserved on the PIC18C2X2 devices. Always maintain these bits clear.