Datasheet

PIC18CXX2
DS39026D-page 156 1999-2013 Microchip Technology Inc.
FIGURE 15-2: ASYNCHRONOUS TRANSMISSION
FIGURE 15-3: ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
TABLE 15-6: REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Word 1
STOP Bit
Word 1
Transmit Shift Reg
START Bit Bit 0 Bit 1 Bit 7/8
Write to TXREG
Word 1
BRG Output
(shift clock)
RC6/TX/CK (pin)
TXIF bit
(Transmit buffer
reg. empty flag)
TRMT bit
(Transmit shift
reg. empty flag)
Transmit Shift Reg.
Write to TXREG
BRG Output
(shift clock)
RC6/TX/CK (pin)
TXIF bit
(interrupt reg. flag)
TRMT bit
(Transmit shift
reg. empty flag)
Word 1
Word 2
Word 1
Word 2
START Bit
STOP Bit
START Bit
Transmit Shift Reg.
Word 1
Word 2
Bit 0 Bit 1
Bit 7/8 Bit 0
Note: This timing diagram shows two consecutive transmissions.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR,
BOR
Value on
all other
RESETS
INTCON GIE/GIEH PEIE/
GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u
PIR1
PSPIF
(1)
ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
PIE1 PSPIE
(1)
ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
IPR1
PSPIP
(1)
ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 0000 0000 0000 0000
RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 -00x 0000 -00x
TXREG
USART Transmit Register 0000 0000 0000 0000
TXSTA
CSRC TX9 TXEN SYNC BRGH TRMT TX9D 0000 -010 0000 -010
SPBRG Baud Rate Generator Register 0000 0000 0000 0000
Legend: x = unknown, - = unimplemented locations read as '0'.
Shaded cells are not used for Asynchronous Transmission.
Note 1: The PSPIF, PSPIE and PSPIP bits are reserved on the PIC18C2X2 devices. Always maintain these bits
clear.