Datasheet

 1999-2013 Microchip Technology Inc. DS39026D-page 131
PIC18CXX2
FIGURE 14-10: I
2
C SLAVE MODE WAVEFORM (TRANSMISSION 10-BIT ADDRESS)
SDA SCL SSPIF BF (SSPSTAT<0>)
S
1234 56 789 1 23456789 1 2345 789
P
1 1 1 1 0 A9A8 A7 A6A5A4A3A2A1A0 1 1 1 1 0 A8
R/W=1
ACK
ACK
R/W = 0
ACK
Receive First Byte of Address
Cleared in software
Master sends NACK
A9
6
(PIR1<3>)
Receive Second Byte of Address
Cleared by hardware when SSPADD is updated.
UA (SSPSTAT<1>)
Clock is held low until update of SSPADD has taken place
UA is set indicating that the SSPADD needs to be updated
UA is set indicating that SSPADD needs to be updated
Cleared by hardware when SSPADD is updated.
SSPBUF is written with contents of SSPSR
Dummy read of SSPBUF to clear BF flag
Receive First Byte of Address
12345 789
D7 D6 D5 D4 D3 D1
ACK
D2
6
Transmitting Data Byte
D0
Dummy read of SSPBUF to clear BF flag
Sr
Cleared in software
Write of SSPBUF
initiates transmit
Cleared in software
Transmit is complete
CKP has to be set for clock to be released
Bus Master terminates transfer