Datasheet

 1998-2013 Microchip Technology Inc. DS30289C-page 99
PIC17C7XX
12.3 Read/Write Consideration for
TMR0
Although TMR0 is a 16-bit timer/counter, only 8-bits at
a time can be read or written during a single instruction
cycle. Care must be taken during any read or write.
12.3.1 READING 16-BIT VALUE
The problem in reading the entire 16-bit value is that
after reading the low (or high) byte, its value may
change from FFh to 00h.
Example 12-1 shows a 16-bit read. To ensure a proper
read, interrupts must be disabled during this routine.
EXAMPLE 12-1: 16-BIT READ
12.3.2 WRITING A 16-BIT VALUE TO TMR0
Since writing to either TMR0L or TMR0H will effectively
inhibit increment of that half of the TMR0 in the next
cycle (following write), but not inhibit increment of the
other half, the user must write to TMR0L first and
TMR0H second, in two consecutive instructions, as
shown in Example 12-2. The interrupt must be dis-
abled. Any write to either TMR0L or TMR0H clears the
prescaler.
EXAMPLE 12-2: 16-BIT WRITE
12.4 Prescaler Assignments
Timer0 has an 8-bit prescaler. The prescaler selection
is fully under software control; i.e., it can be changed
“on the fly” during program execution. Clearing the
prescaler is recommended before changing its setting.
The value of the prescaler is “unknown” and assigning
a value that is less than the present value, makes it dif-
ficult to take this unknown time into account.
FIGURE 12-3: TMR0 TIMING: WRITE HIGH OR LOW BYTE
MOVPF TMR0L, TMPLO ;read low tmr0
MOVPF TMR0H, TMPHI ;read high tmr0
MOVFP TMPLO, WREG ;tmplo  wreg
CPFSLT TMR0L ;tmr0l < wreg?
RETURN ;no then return
MOVPF TMR0L, TMPLO ;read low tmr0
MOVPF TMR0H, TMPHI ;read high tmr0
RETURN ;return
BSF CPUSTA, GLINTD ; Disable interrupts
MOVFP RAM_L, TMR0L ;
MOVFP RAM_H, TMR0H ;
BCF CPUSTA, GLINTD ; Done, enable
; interrupts
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
AD15:AD0
ALE
TMR0L
TMR0H
MOVFP W,TMR0L
Write to TMR0L
MOVFP TMR0L,W
Read TMR0L
(Value = NT0)
MOVFP TMR0L,W
Read TMR0L
(Value = NT0)
MOVFP TMR0L,W
Read TMR0L
(Value = NT0 +1)
T0 T0+1 New T0 (NT0) New T0+1
PC
PC+1 PC+2 PC+3 PC+4
Fetch
Instruction
Executed