Datasheet
PIC17C7XX
DS30289C-page 262 1998-2013 Microchip Technology Inc.
FIGURE 20-21: USART ASYNCHRONOUS MODE START BIT DETECT
TABLE 20-16: USART ASYNCHRONOUS MODE START BIT DETECT REQUIREMENTS
FIGURE 20-22: USART ASYNCHRONOUS RECEIVE SAMPLING WAVEFORM
TABLE 20-17: USART ASYNCHRONOUS RECEIVE SAMPLING REQUIREMENTS
RX
x16 CLK
Q2, Q4 CLK
START bit
(RX/DT pin)
121A
120A
123A
Param
No.
Sym Characteristic Min Typ Max
Unit
s
Conditions
120A TdtL2ckH Time to ensure that the RX pin is sampled low — — T
CY ns
121A TdtRF Data rise time and fall time Receive — — (Note 1) ns
Transmit — — 40 ns
123A TckH2bckL Time from RX pin sampled low to first rising edge
of x16 clock
——T
CY ns
Note 1: Schmitt trigger will determine logic level.
RX
Baud CLK
x16 CLK
START bit
Bit0
Samples
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3
Baud CLK for all but START bit
(RX/DT pin)
125A
126A
Param
No.
Sym Characteristic Min Typ Max
Unit
s
Conditions
125A TdtL2ckH Setup time of RX pin to first data sampled T
CY ——ns
126A TdtL2ckH Hold time of RX pin from last data sam-
pled
T
CY ——ns