Datasheet

 1998-2013 Microchip Technology Inc. DS30289C-page 259
PIC17C7XX
FIGURE 20-18: I
2
C BUS DATA TIMING
TABLE 20-13: I
2
C BUS DATA REQUIREMENTS
Param
No.
Sym Characteristic Min Max Units Conditions
100 Thigh Clock high time 100 kHz mode 2(T
OSC)(BRG + 1) — ms
400 kHz mode 2(T
OSC)(BRG + 1) — ms
1 MHz mode
(1)
2(TOSC)(BRG + 1) — ms
101 Tlow Clock low time 100 kHz mode 2(T
OSC)(BRG + 1) — ms
400 kHz mode 2(T
OSC)(BRG + 1) — ms
1 MHz mode
(1)
2(TOSC)(BRG + 1) — ms
102 Tr SDA and SCL rise time 100 kHz mode — 1000 ns Cb is specified to be from
10 to 400 pF
400 kHz mode 20 + 0.1Cb 300 ns
1 MHz mode
(1)
— 300 ns
103 Tf SDA and SCL fall time 100 kHz mode — 300 ns Cb is specified to be from
10 to 400 pF
400 kHz mode 20 + 0.1Cb 300 ns
1 MHz mode
(1)
—10ns
90 Tsu:sta START condition setup
time
100 kHz mode 2(T
OSC)(BRG + 1) — ms Only relevant for Repeated
Start condition
400 kHz mode 2(T
OSC)(BRG + 1) — ms
1 MHz mode
(1)
2(TOSC)(BRG + 1) — ms
91 Thd:sta START condition hold
time
100 kHz mode 2(T
OSC)(BRG + 1) — ms After this period, the first
clock pulse is generated
400 kHz mode 2(T
OSC)(BRG + 1) — ms
1 MHz mode
(1)
2(TOSC)(BRG + 1) — ms
106 Thd:dat Data input hold time 100 kHz mode 0 — ns
400 kHz mode 0 0.9 ms
1 MHz mode
(1)
0—ns
107 Tsu:dat Data input setup time 100 kHz mode 250 — ns (Note 2)
400 kHz mode 100 — ns
1 MHz mode
(1)
100 — ns
92 Tsu:sto STOP condition
setup time
100 kHz mode 2(T
OSC)(BRG + 1) — ms
400 kHz mode 2(T
OSC)(BRG + 1) — ms
1 MHz mode
(1)
2(TOSC)(BRG + 1) — ms
109 Taa Output valid from clock 100 kHz mode — 3500 ns
400 kHz mode — 1000 ns
1 MHz mode
(1)
— 400 ns
Note 1: Maximum pin capacitance = 10 pF for all I
2
C pins.
2: A fast mode (400 KHz) I
2
C bus device can be used in a standard mode I
2
C bus system, but the parameter # 107  250 ns
must then be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If
such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line.
Parameter #102 + #107 = 1000 + 250 = 1250 ns (for 100 kHz mode) before the SCL line is released.
3: C
b
is specified to be from 10-400pF. The minimum specifications are characterized with C
b
=10pF. The rise time spec (t
r
)
is characterized with R
p
=R
p
min. The minimum fall time specification (t
f
) is characterized with C
b
=10pF,and R
p
=R
p
max.
These are only valid for fast mode operation (V
DD=4.5-5.5V) and where the SPM bit (SSPSTAT<7>) =1.)
4: Max specifications for these parameters are valid for falling edge only. Specs are characterized with R
p
=R
p
min and
C
b
=400pF for standard mode, 200pF for fast mode, and 10pF for 1MHz mode.
Note: Refer to Figure 20-5 for load conditions.
90
91 92
100
101
103
106
107
109
109
110
102
SCL
SDA
In
SDA
Out