Datasheet

PIC17C7XX
DS30289C-page 14 1998-2013 Microchip Technology Inc.
TABLE 3-1: PINOUT DESCRIPTIONS
Name
PIC17C75X PIC17C76X
Description
DIP
No.
PLCC
No.
TQFP
No.
PLCC
No.
QFP
No.
I/O/P
Type
Buffer
Type
OSC1/CLKIN 47 50 39 62 49 I ST Oscillator input in Crystal/Resonator or RC Oscillator
mode. External clock input in External Clock mode.
OSC2/CLKOUT 48 51 40 63 50 O Oscillator output. Connects to crystal or resonator in
Crystal Oscillator mode. In RC Oscillator or External
Clock modes, OSC2 pin outputs CLKOUT which has
one fourth the frequency (F
OSC/4) of OSC1 and
denotes the instruction cycle rate.
MCLR
/VPP 15 16 7 20 9 I/P ST Master clear (RESET) input or Programming Voltage
(V
PP) input. This is the active low RESET input to the
device.
PORTA pins have individual differentiations that are
listed in the following descriptions:
RA0/INT 56 60 48 72 58 I ST RA0 can also be selected as an external inter-
rupt input. Interrupt can be configured to be on
positive or negative edge. Input only pin.
RA1/T0CKI 41 44 33 56 43 I ST RA1 can also be selected as an external inter-
rupt input and the interrupt can be configured to
be on positive or negative edge. RA1 can also
be selected to be the clock input to the Timer0
timer/counter. Input only pin.
RA2/SS
/SCL 42 45 34 57 44 I/O
(2)
ST RA2 can also be used as the slave select input
for the SPI or the clock input for the I
2
C bus.
High voltage, high current, open drain port pin.
RA3/SDI/SDA 4346355845I/O
(2)
ST RA3 can also be used as the data input for the
SPI or the data for the I
2
C bus.
High voltage, high current, open drain port pin.
RA4/RX1/DT1 40 43 32 51 38 I/O
(1)
ST RA4 can also be selected as the USART1 (SCI)
Asynchronous Receive or USART1 (SCI)
Synchronous Data.
Output available from USART only.
RA5/TX1/CK13942315037I/O
(1)
ST RA5 can also be selected as the USART1 (SCI)
Asynchronous Transmit or USART1 (SCI)
Synchronous Clock.
Output available from USART only.
PORTB is a bi-directional I/O Port with software
configurable weak pull-ups.
RB0/CAP1 55 59 47 71 57 I/O ST RB0 can also be the Capture1 input pin.
RB1/CAP2 54 58 46 70 56 I/O ST RB1 can also be the Capture2 input pin.
RB2/PWM1 50 54 42 66 52 I/O ST RB2 can also be the PWM1 output pin.
RB3/PWM2 53 57 45 69 55 I/O ST RB3 can also be the PWM2 output pin.
RB4/TCLK12 52 56 44 68 54 I/O ST RB4 can also be the external clock input to
Timer1 and Timer2.
RB5/TCLK3 51 55 43 67 53 I/O ST RB5 can also be the external clock input to
Timer3.
RB6/SCK 44 47 36 59 46 I/O ST RB6 can also be used as the master/slave clock
for the SPI.
RB7/SDO 45 48 37 60 47 I/O ST RB7 can also be used as the data output for the
SPI.
Legend: I = Input only; O = Output only; I/O = Input/Output;
P = Power; — = Not Used; TTL = TTL input; ST = Schmitt Trigger input
Note 1: The output is only available by the peripheral operation.
2: Open drain input/output pin. Pin forced to input upon any device RESET.