Datasheet
PIC17C7XX
DS30289C-page 106 1998-2013 Microchip Technology Inc.
TABLE 13-3: SUMMARY OF TIMER1, TIMER2 AND TIMER3 REGISTERS
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR,
BOR
MCLR, WDT
16h, Bank 3 TCON1
CA2ED1 CA2ED0 CA1ED1 CA1ED0 T16 TMR3CS TMR2CS TMR1CS 0000 0000 0000 0000
17h, Bank 3 TCON2
CA2OVF CA1OVF PWM2ON PWM1ON CA1/PR3 TMR3ON TMR2ON TMR1ON 0000 0000 0000 0000
16h, Bank 7 TCON3
— CA4OVF CA3OVF CA4ED1 CA4ED0 CA3ED1 CA3ED0 PWM3ON
-000 0000 -000 0000
10h, Bank 2 TMR1 Timer1’s Register xxxx xxxx uuuu uuuu
11h, Bank 2 TMR2 Timer2’s Register xxxx xxxx uuuu uuuu
16h, Bank 1 PIR1 RBIF TMR3IF TMR2IF TMR1IF CA2IF CA1IF TX1IF RC1IF x000 0010 u000 0010
17h, Bank 1 PIE1
RBIE TMR3IE TMR2IE TMR1IE CA2IE CA1IE TX1IE RC1IE 0000 0000 0000 0000
07h, Unbanked INTSTA PEIF
T0CKIF T0IF INTF PEIE T0CKIE T0IE INTE 0000 0000 0000 0000
06h, Unbanked CPUSTA
— — STKAV GLINTD TO PD POR BOR
--11 11qq --11 qquu
14h, Bank 2 PR1 Timer1 Period Register xxxx xxxx uuuu uuuu
15h, Bank 2 PR2 Timer2 Period Register xxxx xxxx uuuu uuuu
10h, Bank 3 PW1DCL DC1 DC0
— — — — — — xx-- ---- uu-- ----
11h, Bank 3 PW2DCL DC1 DC0 TM2PW2
— — — — — xx0- ---- uu0- ----
10h, Bank 7 PW3DCL DC1 DC0 TM2PW3
— — — — — xx0- ---- uu0- ----
12h, Bank 3 PW1DCH DC9 DC8 DC7 DC6 DC5 DC4 DC3 DC2 xxxx xxxx uuuu uuuu
13h, Bank 3 PW2DCH DC9 DC8 DC7 DC6 DC5 DC4 DC3 DC2 xxxx xxxx uuuu uuuu
11h, Bank 7 PW3DCH DC9 DC8 DC7 DC6 DC5 DC4 DC3 DC2 xxxx xxxx uuuu uuuu
Legend: x = unknown, u = unchanged, - = unimplemented, read as a '0', q = value depends on condition.
Shaded cells are not used by Timer1 or Timer2.