Datasheet

 1998-2013 Microchip Technology Inc. DS30289C-page 83
PIC17C7XX
FIGURE 10-12: BLOCK DIAGRAM OF RE3/CAP4 PORT PIN
TABLE 10-9: PORTE FUNCTIONS
TABLE 10-10: REGISTERS/BITS ASSOCIATED WITH PORTE
Note: I/O pin has protection diodes to VDD and VSS.
D
CK
Q
D
CK
Q
S
Port
Data
Data Bus
RD_PORTE
WR_PORTE
RD_DDRE
WR_DDRE
EN
QD
EN
P
N
Q
Q
Peripheral In
VDD
Name Bit Buffer Type Function
RE0/ALE bit0 TTL Input/output or system bus Address Latch Enable (ALE) control pin.
RE1/OE
bit1 TTL Input/output or system bus Output Enable (OE) control pin.
RE2/WR
bit2 TTL Input/output or system bus Write (WR) control pin.
RE3/CAP4 bit3 ST Input/output or Capture4 input pin.
Legend: TTL = TTL input, ST = Schmitt Trigger input
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR,
BOR
MCLR, WDT
15h, Bank 1 PORTE
— — — — RE3/CAP4 RE2/WR RE1/OE RE0/ALE
---- xxxx ---- uuuu
14h, Bank 1 DDRE Data Direction Register for PORTE ---- 1111 ---- 1111
14h, Bank 7 CA4L Capture4 Low Byte
xxxx xxxx uuuu uuuu
15h, Bank 7 CA4H Capture4 High Byte
xxxx xxxx uuuu uuuu
16h, Bank 7 TCON3
—CA4OVFCA3OVF CA4ED1 CA4ED0 CA3ED1 CA3ED0 PWM3ON
-000 0000 -000 0000
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by PORTE.