Datasheet

PIC17C7XX
DS30289C-page 62  1998-2013 Microchip Technology Inc.
8.2 Table Writes to External Memory
Table writes to external memory are always two-cycle
instructions. The second cycle writes the data to the
external memory location. The sequence of events for
an external memory write are the same for an internal
write.
8.2.1 TABLE WRITE CODE
The “i” operand of the TABLWT instruction can specify
that the value in the 16-bit TBLPTR register is automat-
ically incremented (for the next write). In Example 8-1,
the TBLPTR register is not automatically incremented.
EXAMPLE 8-1: TABLE WRITE
FIGURE 8-5: TABLWT WRITE TIMING (EXTERNAL MEMORY)
CLRWDT ; Clear WDT
MOVLW HIGH (TBL_ADDR) ; Load the Table
MOVWF TBLPTRH ; address
MOVLW LOW (TBL_ADDR) ;
MOVWF TBLPTRL ;
MOVLW HIGH (DATA) ; Load HI byte
TLWT 1, WREG ; in TABLATH
MOVLW LOW (DATA) ; Load LO byte
TABLWT 0,0,WREG ; in TABLATL
; and write to
; program memory
; (Ext. SRAM)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
AD15:AD0
Instruction
Fetched
Instruction
Executed
ALE
OE
WR
TABLWT
INST (PC+1)
INST (PC-1)
TABLWT cycle1 TABLWT cycle2
INST (PC+2)
Data write cycle
'1'
PC PC+1 TBL PC+2Data out
INST (PC+1)
Note: If external write and GLINTD = '1' and Enable bit = '1', then when '1'  Flag bit, do table write.
The highest pending interrupt is cleared.
OE