Datasheet

1998-2013 Microchip Technology Inc. DS30289C-page 265
PIC17C7XX
FIGURE 20-24: MEMORY INTERFACE WRITE TIMING
TABLE 20-20: MEMORY INTERFACE WRITE REQUIREMENTS
OSC1
ALE
OE
WR
AD<15:0>
Q1 Q2 Q3 Q4
Q1
Q2
150
151
152
153
154
addr out
data out
addr out
Q1
Param.
No.
Sym Characteristic Min Typ† Max
Unit
s
Conditions
150 TadV2alL AD<15:0> (address) valid
to
PIC17CXXX 0.25T
CY - 10 ns
ALE (address setup
time)
PIC17LCXXX 0.25T
CY - 10
151 TalL2adI ALE to address out invalid PIC17CXXX 0 ns
(address hold time) PIC17LCXXX 0
152 TadV2wrL Data out valid to WR
PIC17CXXX 0.25TCY - 40 ns
(data setup time) PIC17LCXXX 0.25T
CY - 40
153 TwrH2adI WR
to data out invalid PIC17CXXX 0.25TCY —ns
(data hold time) PIC17LCXXX 0.25T
CY
154 TwrL WR
pulse width PIC17CXXX 0.25TCY —ns
PIC17LCXXX 0.25T
CY
Data in “Typ” column is at 5V, 25C unless otherwise stated.