Datasheet

 1998-2013 Microchip Technology Inc. DS30289C-page 251
PIC17C7XX
FIGURE 20-8: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP
TIMER, AND BROWN-OUT RESET TIMING
TABLE 20-3: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,
AND BROWN-OUT RESET REQUIREMENTS
VDD
MCLR
Internal
POR
/BOR
PWRT
Time-out
OSC
Time-out
Internal
Reset
Watchdog
Timer
Reset
33
32
30
31
Address/
Data
35
Param.
No.
Sym Characteristic Min Typ† Max Units Conditions
30 TmcL MCLR
Pulse Width (low) 100 — — ns VDD = 5V
31 T
WDT Watchdog Timer Time-out Period
(Postscale = 1)
5 12 25 ms VDD = 5V
32 T
OST Oscillation Start-up Timer Period — 1024TOSC —msTOSC = OSC1 period
33 T
PWRT Power-up Timer Period 40 96 200 ms VDD = 5V
34 T
IOZ MCLR to I/O hi-impedance 100 — — ns Depends on pin load
35 TmcL2adI MCLR
to System
Interface bus
(AD15:AD0>) invalid
PIC17C7XX — — 100 ns
PIC17LC7XX — — 120 ns
36 T
BOR Brown-out Reset Pulse Width (low) 100 — — ns VDD within VBOR limits
(parameter D005)
† Data in “Typ” column is at 5V, 25C unless otherwise stated.
.