Datasheet
PIC17C7XX
DS30289C-page 220 1998-2013 Microchip Technology Inc.
NEGW Negate W
Syntax: [label] NEGW f,s
Operands: 0 f 255
s [0,1]
Operation: WREG
+ 1 (f);
WREG
+ 1 s
Status Affected: OV, C, DC, Z
Encoding:
0010 110s ffff ffff
Description:
WREG is negated using two’s comple-
ment. If 's' is 0, the result is placed in
WREG and data memory location 'f'. If
's' is 1, the result is placed only in data
memory location 'f'.
Words: 1
Cycles: 1
Q Cycle Activity:
Q1 Q2 Q3 Q4
Decode Read
register 'f'
Process
Data
Write
register 'f'
and other
specified
register
Example:
NEGW REG,0
Before Instruction
WREG = 0011 1010 [0x3A],
REG = 1010 1011 [0xAB]
After Instruction
WREG = 1100 0110 [0xC6]
REG = 1100 0110 [0xC6]
NOP No Operation
Syntax: [ label ] NOP
Operands: None
Operation: No operation
Status Affected: None
Encoding:
0000 0000 0000 0000
Description:
No operation.
Words: 1
Cycles: 1
Q Cycle Activity:
Q1 Q2 Q3 Q4
Decode No
operation
No
operation
No
operation
Example:
None.