Datasheet

1998-2013 Microchip Technology Inc. DS30289C-page 181
PIC17C7XX
The ADRESH:ADRESL registers contain the 10-bit
result of the A/D conversion. When the A/D conversion
is complete, the result is loaded into this A/D result reg-
ister pair, the GO/DONE
bit (ADCON0<2>) is cleared
and A/D interrupt flag bit, ADIF is set. The block
diagrams of the A/D module are shown in Figure 16-1.
After the A/D module has been configured as desired,
the selected channel must be acquired before the con-
version is started. The analog input channels must
have their corresponding DDR bits selected as inputs.
To determine sample time, see Section 16.1. After this
acquisition time has elapsed, the A/D conversion can
be started. The following steps should be followed for
doing an A/D conversion:
1. Configure the A/D module:
a) Configure analog pins/voltage reference/
and digital I/O (ADCON1)
b) Select A/D input channel (ADCON0)
c) Select A/D conversion clock (ADCON0)
d) Turn on A/D module (ADCON0)
2. Configure A/D interrupt (if desired):
a) Clear ADIF bit
b) Set ADIE bit
c) Clear GLINTD bit
3. Wait the required acquisition time.
4. Start conversion:
a) Set GO/DONE
bit (ADCON0)
5. Wait for A/D conversion to complete, by either:
a) Polling for the GO/DONE
bit to be cleared
OR
b) Waiting for the A/D interrupt
6. Read A/D Result register pair
(ADRESH:ADRESL), clear bit ADIF, if required.
7. For next conversion, go to step 1 or step 2, as
required. The A/D conversion time per bit is
defined as T
AD. A minimum wait of 2TAD is
required before next acquisition starts.
FIGURE 16-1: A/D BLOCK DIAGRAM
(Input Voltage)
V
IN
VREF-
(Reference
Voltage)
AV
DD
PCFG0
CHS3:CHS0
AN7
AN6
AN5
AN4
AN3
AN2
AN1/V
REF-
AN0/V
REF+
0111
0110
0101
0100
0011
0010
0001
0000
A/D
Converter
AN11
AN10
AN9
AN8
1011
1010
1001
1000
VREF+
AVSS
AN12
(1)
1011
AN13
(1)
1011
AN14
(1)
1011
AN15
(1)
1011
Note 1: These channels are only available on PIC16C76X devices.