Datasheet

 1996 Microchip Technology Inc. DS30412C-page 85
PIC17C4X
FIGURE 13-3: USART TRANSMIT
FIGURE 13-4: USART RECEIVE
CK/TX
DT
Sync/Async
TSR
Start 0 1 7 8 Stop
• • •
÷ 16
÷ 4BRG
01 7
• • •
8 Bit Count
TXIE
Interrupt
TXEN/
Write to TXREG
Clock
Sync/AsyncSync/Async
TXSTA<0>
Sync
Master/Slave
Data Bus
Load
TXREG
CK
RX
0178Stop
• • •
÷ 16
÷ 4
BRG
Bit Count
Clock
Buffer
Logic
Buffer
Logic
SPEN
OSC
START
017RX9D
• • •
017RX9D
• • •
FERR
FERR
Majority
Detect
Data
MSb LSb
RSR
RCREG
Async/Sync
Sync/Async
Master/Slave
Sync
enable
FIFO
Logic
Clk
FIFO
RCIE
Interrupt
RX9
Data Bus
SREN/
CREN/
Start_Bit
Async/Sync
Detect