Datasheet

PIC17C4X
DS30412C-page 48  1996 Microchip Technology Inc.
7.3 T
able Reads
The table read allows the program memory to be read.
This allows constant data to be stored in the program
memory space, and retrieved into data memory when
needed. Example 7-2 reads the 16-bit value at pro-
gram memory address TBLPTR. After the dummy byte
has been read from the TABLATH, the TABLATH is
loaded with the 16-bit data from program memory
address TBLPTR + 1. The first read loads the data into
the latch, and can be considered a dummy read
(unknown data loaded into 'f'). INDF0 should be con-
figured for either auto-increment or auto-decrement.
EXAMPLE 7-2: TABLE READ
MOVLW HIGH (TBL_ADDR) ; Load the Table
MOVWF TBLPTRH ; address
MOVLW LOW (TBL_ADDR) ;
MOVWF TBLPTRL ;
TABLRD 0,0,DUMMY ; Dummy read,
; Updates TABLATCH
TLRD 1, INDF0 ; Read HI byte
; of TABLATCH
TABLRD 0,1,INDF0 ; Read LO byte
; of TABLATCH and
; Update TABLATCH
FIGURE 7-7: TABLRD TIMING
FIGURE 7-8: TABLRD TIMING (CONSECUTIVE TABLRD INSTRUCTIONS)
Q1 Q2
Q3
Q4
Q1 Q2
Q3
Q4
Q1 Q2
Q3
Q4
Q1 Q2
Q3
Q4
AD15:AD0
Instruction
fetched
Instruction
executed
ALE
OE
WR
TABLRD INST (PC+1)
INST (PC+2)
INST (PC-1)
TABLRD cycle1
TABLRD cycle2 INST (PC+1)
Data read cycle
PC PC+1 TBL Data in
PC+2
'1'
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
AD15:AD0
Instruction
fetched
Instruction
executed
TABLRD1
TABLRD2
INST (PC+2) INST (PC+3)
INST (PC+2)
ALE
OE
WR
INST (PC-1) TABLRD1 cycle1 TABLRD1 cycle2 TABLRD2 cycle1
TABLRD2 cycle2
Data read cycle Data read cycle
'1'
PC
PC+1
PC+2
PC+3
TBL1
Data in 1
TBL2 Data in 2