Datasheet

 1996 Microchip Technology Inc. DS30412C-page 187
PIC17C4X
Applicable Devices 42 R42 42A 43 R43 44
FIGURE 19-5: TIMER0 CLOCK TIMINGS
TABLE 19-5: TIMER0 CLOCK REQUIREMENTS
FIGURE 19-6: TIMER1, TIMER2, AND TIMER3 CLOCK TIMINGS
TABLE 19-6: TIMER1, TIMER2, AND TIMER3 CLOCK REQUIREMENTS
Parameter
No. Sym Characteristic Min Typ† Max Units Conditions
40 Tt0H T0CKI High Pulse Width No Prescaler 0.5TCY + 20 § — — ns
With Prescaler 10* — — ns
41 Tt0L T0CKI Low Pulse Width No Prescaler 0.5TCY + 20 § — — ns
With Prescaler 10* — — ns
42 Tt0P T0CKI Period Greater of:
20 ns or Tcy + 40 §
N
— — ns N = prescale value
(1, 2, 4, ..., 256)
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
§ This specification ensured by design.
Parameter
No. Sym Characteristic Min
Typ
† Max Units Conditions
45 Tt123H TCLK12 and TCLK3 high time 0.5T
CY + 20 § — — ns
46 Tt123L TCLK12 and TCLK3 low time 0.5TCY + 20 § — — ns
47 Tt123P TCLK12 and TCLK3 input period TCY + 40 §
N
— — ns N = prescale value
(1, 2, 4, 8)
48 TckE2tmrI Delay from selected External Clock Edge to
Timer increment
2TOSC § 6Tosc §
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
§ This specification ensured by design.
RA1/T0CKI
40 41
42
TCLK12
45
46
or
TCLK3
TMRx
48
48
47