Datasheet

 1996 Microchip Technology Inc. DS30412C-page 131
PIC17C4X
RETFIE Return from Interrupt
Syntax: [
label ] RETFIE
Operands: None
Operation: TOS → (PC);
0 → GLINTD;
PCLATH is unchanged.
Status Affected: GLINTD
Encoding:
0000 0000 0000 0101
Description:
Return from Interrupt. Stack is POP’ed
and Top of Stack (TOS) is loaded in the
PC. Interrupts are enabled by clearing
the GLINTD bit. GLINTD is the global
interrupt disable bit (CPUSTA<4>).
Words: 1
Cycles: 2
Q Cycle Activity:
Q1 Q2 Q3 Q4
Decode Read
register
T0STA
Execute NOP
Forced NOP NOP Execute NOP
Example:
RETFIE
After Interrupt
PC = TOS
GLINTD = 0
RETLW Return Literal to WREG
Syntax: [
label ] RETLW k
Operands: 0 ≤ k ≤ 255
Operation: k → (WREG); TOS → (PC);
PCLATH is unchanged
Status Affected: None
Encoding:
1011 0110 kkkk kkkk
Description:
WREG is loaded with the eight bit literal
'k'. The program counter is loaded from
the top of the stack (the return address).
The high address latch (PCLATH)
remains unchanged.
Words: 1
Cycles: 2
Q Cycle Activity:
Q1 Q2 Q3 Q4
Decode Read
literal 'k'
Execute Write to
WREG
Forced NOP NOP Execute NOP
Example:
CALL TABLE ; WREG contains table
; offset value
; WREG now has
; table value
:
TABLE
ADDWF PC ; WREG = offset
RETLW k0 ; Begin table
RETLW k1 ;
:
:
RETLW kn ; End of table
Before Instruction
WREG = 0x07
After Instruction
WREG = value of k7