Datasheet

PIC16(L)F720/721
DS40001430E-page 82  2010-2013 Microchip Technology Inc.
FIGURE 9-3: ANALOG INPUT MODEL
FIGURE 9-4: ADC TRANSFER FUNCTION
Note 1: The reference voltage (VREF) has no effect on the equation, since it cancels itself out.
2: The charge holding capacitor (C
HOLD) is not discharged after each conversion.
3: The maximum recommended impedance for analog sources is 10 k. This is required to meet the pin
leakage specification.
CPIN
VA
Rs
ANx
5 pF
V
DD
VT  0.6V
V
T  0.6V
I LEAKAGE
(1)
RIC  1k
Sampling
Switch
SS
Rss
C
HOLD = 20 pF
V
SS
6V
Sampling Switch, Typical
4V
2V
510
(k)
V
DD
Legend:
C
PIN
VT
I LEAKAGE
RIC
SS
C
HOLD
= Input Capacitance
= Threshold Voltage
= Leakage current at the pin due to
= Interconnect Resistance
= Sampling Switch
= Sample/Hold Capacitance
various junctions
Note 1: Refer to Section 23.0 “Electrical Specifications”.
RSS = Resistance of Sampling Switch
15
20
FFh
FEh
ADC Output Code
FDh
FCh
04h
03h
02h
01h
00h
Full-Scale
FBh
1 LSB ideal
VSS
Zero-Scale
Transition
V
REF
Transition
1 LSB ideal
Full-Scale Range
Analog Input Voltage