Datasheet

PIC16(L)F720/721
DS40001430E-page 76  2010-2013 Microchip Technology Inc.
9.1 ADC Configuration
When configuring and using the ADC the following
functions must be considered:
• Port configuration
• Channel selection
• ADC conversion clock source
• Interrupt control
9.1.1 PORT CONFIGURATION
When converting analog signals, the I/O pin selected
as the input channel should be configured for analog by
setting the associated TRIS and ANSEL bits. Refer to
Section 6.0 “I/O Ports” for more information.
9.1.2 CHANNEL SELECTION
There are 14 channel selections available:
-AN<11:0> pins
- Temperature Indicator
- FVR (Fixed Voltage Reference) Output
Refer to Section 11.0 “Temperature Indicator Mod-
ule” and Section 10.0 “Fixed Voltage Reference” for
more information on these channel selections.
The CHS bits of the ADCON0 register determine which
channel is connected to the sample and hold circuit.
When changing channels, a delay is required before
starting the next conversion. Refer to Section 9.2
“ADC Operation” for more information.
9.1.3 CONVERSION CLOCK
The source of the conversion clock is software
selectable via the ADCS bits of the ADCON1 register.
There are seven possible clock options:
•F
OSC/2
•FOSC/4
•FOSC/8
•F
OSC/16
•FOSC/32
•FOSC/64
•F
RC (dedicated internal oscillator)
The time to complete one bit conversion is defined as
TAD. One full 8-bit conversion requires 10 TAD periods
as shown in Figure 9-2.
For correct conversion, the appropriate T
AD
specification must be met. Refer to the A/D conversion
requirements in Section 23.0 “Electrical
Specifications” for more information. Table 9-1 gives
examples of appropriate ADC clock selections.
Note: Analog voltages on any pin that is defined
as a digital input may cause the input buf-
fer to conduct excess current.
Note: Unless using the FRC, any changes in the
system clock frequency will change the
ADC clock frequency, which may
adversely affect the ADC result.
TABLE 9-1: ADC CLOCK PERIOD (TAD) VS. DEVICE OPERATING FREQUENCIES
ADC Clock Period (TAD)
Device Frequency (F
OSC)
ADC
Clock Source
ADCS<2:0> 16 MHz 8 MHz 4 MHz 1 MHz
F
OSC/2 000 125 ns
(2)
250 ns
(2)
500 ns
(2)
2.0 s
F
OSC/4 100 250 ns
(2)
500 ns
(2)
1.0 s4.0 s
FOSC/8 001 0.5 s
(2)
1.0 s2.0 s8 s
(5)
FOSC/16 101 1.0 s2.0 s4.0 s16.0 s
(5)
FOSC/32 010 2.0 s4.0 s8 s
(5)
32.0 s
(3)
FOSC/64 110 4.0 s8 s
(5)
16.0 s
(5)
64.0 s
(3)
FRC x11 1.0-6.0 s
(1,4)
1.0-6.0 s
(1,4)
1.0-6.0 s
(1,4)
1.0-6.0 s
(1,4)
Legend: Shaded cells are outside of recommended range.
Note 1: The F
RC source has a typical TAD time of 1.6 s for VDD.
2: These values violate the minimum required TAD time.
3: For faster conversion times, the selection of another clock source is recommended.
4: When the device frequency is greater than 1 MHz, the F
RC clock source is only recommended if the
conversion will be performed during Sleep.
5: Recommended values for V
DD  2.0V and temperature -40°C to 85°C. The 16.0 s setting should be
avoided for temperature > 85°C.