Datasheet

 2010-2013 Microchip Technology Inc. DS40001430E-page 53
PIC16(L)F720/721
FIGURE 6-6: BLOCK DIAGRAM OF RA5
I/O Pin
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
VDD
D
EN
Q
D
EN
Q
Weak
Data Bus
WR
WPUA
RD
WPUA
RD
PORTA
WR
PORTA
WR
TRISA
RD
TRISA
WR
IOCA
RD
IOCA
To TMR1 or CLKIN
INTOSC
mode
RD PORTA
INTOSC
mode
RABPU
Interrupt-on-
Change
Q3
TABLE 6-1: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
ANSELA — — — ANSA4 — ANSA2 ANSA1 ANSA0 47
OPTION_REG
RABPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 21
PORTA
— —
RA5 RA4 RA3 RA2 RA1 RA0 46
TRISA
— —
TRISA5 TRISA4
—
TRISA2 TRISA1 TRISA0 46
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by
PORTA.