Datasheet

PIC16(L)F720/721
DS40001430E-page 46  2010-2013 Microchip Technology Inc.
REGISTER 6-1: PORTA: PORTA REGISTER
U-0 U-0 R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u
— — RA5 RA4 RA3
(1)
RA2 RA1 RA0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0’
bit 5-0 RA<5:0>: PORTA I/O Pin bit
1 = Port pin is > V
IH
0 = Port pin is < VIL
Note 1: RA<3> is input only.
REGISTER 6-2: TRISA: PORTA TRI-STATE REGISTER
U-0 U-0 R/W-1 R/W-1 U-1 R/W-1 R/W-1 R/W-1
— — TRISA5 TRISA4 —
(1)
TRISA2 TRISA1 TRISA0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0’
bit 5-4 TRISA<5:4>: PORTA Tri-State Control bit
1 = PORTA pin configured as an input (tri-stated)
0 = PORTA pin configured as an output
bit 3 Unimplemented: Read as ‘1’
bit 2-0 TRISA<2:0>: PORTA Tri-State Control bit
1 = PORTA pin configured as an input (tri-stated)
0 = PORTA pin configured as an output
Note 1: TRISA<3> is unimplemented and read as 1.
REGISTER 6-3: WPUA: WEAK PULL-UP PORTA REGISTER
U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
— —WPUA5WPUA4
WPUA3
(2)
WPUA2 WPUA1 WPUA0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0’
bit 5-0 WPUA<5:0>: Weak Pull-up PORTA Control bits
1 = Weak pull-up enabled
(1)
0 = Weak pull-up disabled
Note 1: Enabling weak pull-ups also requires that the RABPU
bit of the OPTION_REG register be cleared.
2: If MCLREN = 1, WPUA3 is always enabled.