Datasheet

 2010-2013 Microchip Technology Inc. DS40001430E-page 29
PIC16(L)F720/721
3.5 Brown-out Reset (BOR)
Brown-out Reset is enabled by programming the
BOREN<1:0> bits in the Configuration register.
Between the POR and BOR, complete voltage range
coverage for execution protection can be
implemented.
Two bits are used to enable the BOR. When
BOREN = 11, the BOR is always enabled. When
BOREN = 10, the BOR is enabled, but disabled during
Sleep. When BOREN = 0X, the BOR is disabled.
If V
DD falls below VBOR for greater than parameter
(T
BOR) (see Section 23.0 “Electrical Specifica-
tions”), the Brown-out situation will reset the device.
This will occur regardless of VDD slew rate. A Reset is
not ensured to occur if V
DD falls below VBOR for more
than parameter (T
BOR).
If V
DD drops below VBOR while the Power-up Timer is
running, the chip will go back into a Brown-out Reset
and the Power-up Timer will be re-initialized. Once VDD
rises above VBOR, the Power-up Timer will execute a
64 ms Reset.
FIGURE 3-4: BROWN-OUT SITUATIONS
64 ms
(1)
VBOR
V
DD
Internal
Reset
VBOR
V
DD
Internal
Reset
64 ms
(1)
< 64 ms
64 ms
(1)
VBOR
V
DD
Internal
Reset
Note 1: 64 ms delay only if PWRTE bit is programmed to ‘0’.