Datasheet

PIC16(L)F720/721

DS40001430E-page 26  2010-2013 Microchip Technology Inc.

TABLE 3-1: STATUS BITS AND THEIR SIGNIFICANCE

POR BOR TO PD Condition

0x11Power-on Reset or LDO Reset

0x0xIllegal, TO

is set on POR

0xx0Illegal, PD is set on POR

1011Brown-out Reset

1101WDT Reset

1100WDT Wake-up

11uuMCLR

Reset during normal operation

1110MCLR

Reset during Sleep or interrupt wake-up from Sleep

TABLE 3-2: RESET CONDITION FOR SPECIAL REGISTERS

(2)

Condition

Program

Counter

STATUS

PCON

Power-on Reset 0000h 0001 1xxx ---- --0x

MCLR Reset during normal operation 0000h 000u uuuu ---- --uu

MCLR

Reset during Sleep 0000h 0001 0uuu ---- --uu

WDT Reset 0000h 0000 1uuu ---- --uu

WDT Wake-up PC + 1 uuu0 0uuu ---- --uu

Brown-out Reset 0000h 0001 1uuu ---- --u0

Interrupt Wake-up from Sleep PC + 1

(1)

uuu1 0uuu ---- --uu

Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’.

Note 1: When the wake-up is due to an interrupt and Global Interrupt Enable bit (GIE) is set, the return address is

pushed on the stack and PC is loaded with the interrupt vector (0004h) after execution of PC + 1.

2: If a Status bit is not implemented, that bit will be read as ‘0’.