Datasheet
PIC16(L)F720/721
DS40001430E-page 18 2010-2013 Microchip Technology Inc.
Bank 2
100h
(
2
)
INDF Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx xxxx xxxx
101h TMR0 Timer0 module Register xxxx xxxx uuuu uuuu
102h
(
2
)
PCL Program Counter (PC) Least Significant Byte 0000 0000 0000 0000
103h
(
2
)
STATUS IRP RP1 RP0 TO PD ZDCC0001 1xxx 000q quuu
104h
(
2
)
FSR Indirect Data Memory Address Pointer xxxx xxxx uuuu uuuu
105h
— Unimplemented — —
106h
— Unimplemented — —
107h
— Unimplemented — —
108h
— Unimplemented — —
109h
— Unimplemented — —
10Ah
(
1
),(
2
)
PCLATH — — — Write Buffer for the upper 5 bits of the Program Counter ---0 0000 ---0 0000
10Bh
(
2
)
INTCON GIE PEIE TMR0IE INTE RABIE TMR0IF INTF RABIF 0000 000x 0000 000x
10Ch PMDATL Program Memory Read Data Register Low Byte xxxx xxxx xxxx xxxx
10Dh PMADRL Program Memory Read Address Register Low Byte 0000 0000 0000 0000
10Eh PMDATH
— — Program Memory Read Data Register High Byte --xx xxxx --xx xxxx
10Fh PMADRH
— — — Program Memory Read Address Register High Byte ---0 0000 ---0 0000
110h
— Unimplemented — —
111h
— Unimplemented — —
112h
— Unimplemented — —
113h
— Unimplemented — —
114h
— Unimplemented — —
115h WPUB WPUB7 WPUB6 WPUB5 WPUB4
— — — — 1111 ---- 1111 ----
116h IOCB IOCB7 IOCB6 IOCB5 IOCB4
— — — — 0000 ---- 0000 ----
117h
— Unimplemented — —
118h
— Unimplemented — —
119h
— Unimplemented — —
11Ah
— Unimplemented — —
11Bh
— Unimplemented — —
11Ch
— Unimplemented — —
11Dh
— Unimplemented — —
11Eh
— Unimplemented — —
11Fh
— Unimplemented — —
TABLE 2-2: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8>, whose contents are transferred to the
upper byte of the program counter.
2: These registers can be addressed from any bank.
3: Accessible only when SSPM<3:0> = 1001.
4: This bit is unimplemented and reads as ‘1’.
5: See Register 6-2.