Datasheet
PIC16(L)F720/721
DS40001430E-page 146 2010-2013 Microchip Technology Inc.
TABLE 17-1: SUMMARY OF REGISTERS ASSOCIATED WITH SPI OPERATION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
ANSELC ANSC7 ANSC6 — — ANSC3 ANSC2 ANSC1 ANSC0 61
INTCON GIE PEIE
TMR0IE INTE RABIE TMR0IF INTF RABIF 38
PIE1
TMR1GIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE
39
PIR1
TMR1GIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF
40
PR2 Timer2 module Period Register 105
SSPBUF Synchronous Serial Port Receive Buffer/Transmit Register 139
SSPCON WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 144
SSPSTAT SMP CKE
D/A P S R/W UA BF 145
TRISB TRISB7 TRISB6 TRISB5 TRISB4 — — — — 55
TRISC TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 61
T2CON
— TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 106
Legend: x = unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used by the SSP in
SPI mode.