Datasheet

PIC16(L)F720/721
DS40001430E-page 14  2010-2013 Microchip Technology Inc.
FIGURE 2-3: PIC16(L)F720 SPECIAL FUNCTION REGISTERS
File Address
INDF
(*)
00h
INDF
(*)
80h
INDF
(*)
100h
INDF
(*)
180h
TMR0 01h OPTION_REG 81h TMR0 101h OPTION_REG 181h
PCL 02h PCL 82h PCL 102h PCL 182h
STATUS 03h STATUS 83h STATUS 103h STATUS 183h
FSR 04h FSR 84h FSR 104h FSR 184h
PORTA 05h TRISA 85h
105h
ANSELA
185h
PORTB 06h TRISB 86h
106h
ANSELB
186h
PORTC 07h TRISC 87h
107h
ANSELC
187h
08h 88h 108h 188h
09h 89h 109h 189h
PCLATH 0Ah PCLATH 8Ah PCLATH 10Ah PCLATH 18Ah
INTCON 0Bh INTCON 8Bh INTCON 10Bh INTCON 18Bh
PIR1 0Ch PIE1 8Ch PMDATL 10Ch PMCON1 18Ch
0Dh
8Dh PMADRL 10Dh PMCON2 18Dh
TMR1L 0Eh PCON 8Eh PMDATH 10Eh
18Eh
TMR1H 0Fh T1GCON 8Fh PMADRH 10Fh
18Fh
T1CON 10h OSCCON 90h
110h 190h
TMR2 11h OSCTUNE 91h
111h 191h
T2CON 12h PR2 92h
112h 192h
SSPBUF 13h SSPADD/SSPMSK 93h
113h 193h
SSPCON 14h SSPSTAT 94h
114h 194h
CCPR1L 15h WPUA 95h WPUB 115h
195h
CCPR1H 16h IOCA 96h IOCB 116h
196h
CCP1CON 17h
97h 117h 197h
RCSTA 18h TXSTA 98h
118h 198h
TXREG 19h SPBRG 99h
119h 199h
RCREG 1Ah
9Ah 11Ah 19Ah
1Bh 9Bh 11Bh 19Bh
1Ch 9Ch 11Ch 19Ch
1Dh FVRCON 9Dh 11Dh 19Dh
ADRES
1Eh
9Eh 11Eh 19Eh
ADCON0 1Fh ADCON1 9Fh
11Fh 19Fh
General
Purpose
Register
80 Bytes
20h
General
Purpose
Register
32 Bytes
A0h
BFh
120h 1A0h
C0h
06Fh
EFh 16Fh 1EFh
Access RAM
070h
Accesses
70h – 7Fh
F0h
Accesses
70h – 7Fh
170h
Accesses
70h – 7Fh
1F0h
7Fh FFh 17Fh 1FFh
BANK 0 BANK 1 BANK 2 BANK 3
Legend: = Unimplemented data memory locations, read as ‘0’.
* = Not a physical register.