Datasheet

PIC16(L)F1938/9
DS40001574C-page 386 2011-2013 Microchip Technology Inc.
Power-down Base Current (IPD)
(2)
D028 0.1 5.0 8.0 A 1.8 A/D Current (Note 1, Note 3), no
conversion in progress
0.1 6.0 9.0
A3.0
D028 16 35 45 A 1.8 A/D Current (Note 1, Note 3), no
conversion in progress
21 40 50 A 3.0
25 50 60 A 5.0
D028A 250
A 1.8 A/D Current (Note 1, Note 3),
conversion in progress
—250
A3.0
D028A 280 A 1.8 A/D Current (Note 1, Note 3),
conversion in progress
280 A 3.0
280 A 5.0
D029* 3.5
A 1.8 Cap Sense, Low-Power mode
—7.0
A3.0
D029* 17 A 1.8 Cap Sense, Low-Power mode
21 A 3.0
22 A 5.0
D030 1
A 3.0 LCD Bias Ladder, Low power
—10
A 3.0 LCD Bias Ladder, Medium power
—75
A 3.0 LCD Bias Ladder, High power
D030 1 A 5.0 LCD Bias Ladder, Low power
10 A 5.0 LCD Bias Ladder, Medium power
75 A 5.0 LCD Bias Ladder, High power
D031 7.6 22 25
A 1.8 Comparator, Low-Power mode
8.0 23 27
A3.0
D031 24 50 60 A 1.8 Comparator, Low-Power mode
26 70 80 A 3.0
28 75 85 A 5.0
30.3 DC Characteristics: PIC16(L)F1938/39-I/E (Power-Down) (Continued)
PIC16LF1938/39
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C TA +85°C for industrial
-40°C
TA +125°C for extended
PIC16F1938/39
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C TA +85°C for industrial
-40°C
TA +125°C for extended
Param
No.
Device Characteristics Min. Typ†
Max.
+85°C
Max.
+125°C
Units
Conditions
V
DD Note
* These parameters are characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
Note 1: The peripheral current is the sum of the base IDD or IPD and the additional current consumed when this peripheral is
enabled. The peripheral
current can be determined by subtracting the base IDD or IPD current from this limit. Max
values should be used when calculating total current consumption.
2: The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with
the part in Sleep mode, with all I/O pins in high-impedance state and tied to V
DD.
3: A/D oscillator source is FRC.
4: 0.1 F capacitor on VCAP (RA0).