Datasheet

 2011 Microchip Technology Inc. Preliminary DS41569A-page 239
PIC16LF1904/6/7
FIGURE 22-3: POR AND POR REARM WITH SLOW RISING VDD
22.1 DC Characteristics: PIC16LF1904/6/7-I/E (Industrial, Extended)
PIC16LF1904/6/7
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C  TA  +85°C for industrial
-40°C
 TA  +125°C for extended
Param.
No.
Sym. Characteristic Min. Typ† Max. Units Conditions
Supply Voltage
D001 VDD 1.8 — 3.6 V FOSC  16 MHz:
D002* V
DR RAM Data Retention Voltage
(1)
1.5 — — V Device in Sleep mode
D002A* V
POR* Power-on Reset Release Voltage —1.6— V
D002B* V
PORR* Power-on Reset Rearm Voltage — 1.7 — V Device in Sleep mode
D003 V
ADFVR Fixed Voltage Reference Voltage for
ADC, Initial Accuracy
6
7
7
8
—
—
—
—
4
4
6
6
%1.024V, V
DD  1.8V, 85°C
1.024V, V
DD  1.8V, 125°C
2.048V, V
DD  2.5V, 85°C
2.048V, V
DD  2.5V, 125°C
D003A V
CDAFVR Fixed Voltage Reference Voltage for
Comparator and DAC, Initial Accu-
racy
7
8
8
9
—
—
—
—
5
5
7
7
%1.024V, V
DD  1.8V, 85°C
1.024V, V
DD  1.8V, 125°C
2.048V, V
DD  2.5V, 85°C
2.048V, V
DD  2.5V, 125°C
D003B V
LCDFVR Fixed Voltage Reference Voltage for
LCD Bias, Initial Accuracy
9
9.5
—
—
9
9
%3.072V, VDD  3.6V, 85°C
3.072V, V
DD  3.6V, 125°C
D003C* TCV
FVR Temperature Coefficient, Fixed Volt-
age Reference
— -130 — ppm/°C
D003D*
VFVR/
VIN
Line Regulation, Fixed Voltage Ref-
erence
— 0.270 — %/V
D004* S
VDD VDD Rise Rate to ensure internal
Power-on Reset signal
0.05 — — V/ms See Section 5.1 “Power-on Reset
(POR)”
for details.
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
Note 1: This is the limit to which VDD can be lowered in Sleep mode without losing RAM data.
VDD
VPOR
VPORR
VSS
VSS
NPOR
TPOR
(3)
POR REARM
Note 1: When NPOR is low, the device is held in Reset.
2: TPOR 1 s typical.
3: TVLOW 2.7 s typical.
TVLOW
(2)