Datasheet

 2011 Microchip Technology Inc. Preliminary DS41569A-page 215
PIC16LF1904/6/7
19.11 Operation During Sleep
The LCD module can operate during Sleep. The
selection is controlled by bit SLPEN of the LCDCON
register. Setting the SLPEN bit allows the LCD module
to go to Sleep. Clearing the SLPEN bit allows the
module to continue to operate during Sleep.
If a SLEEP instruction is executed and SLPEN = 1, the
LCD module will cease all functions and go into a very
low-current Consumption mode. The module will stop
operation immediately and drive the minimum LCD
voltage on both segment and common lines.
Figure 19-20 shows this operation.
The LCD module can be configured to operate during
Sleep. The selection is controlled by bit SLPEN of the
LCDCON register. Clearing SLPEN and correctly con-
figuring the LCD module clock will allow the LCD mod-
ule to operate during Sleep. Setting SLPEN and
correctly executing the LCD module shutdown will dis-
able the LCD module during Sleep and save power.
If a SLEEP instruction is executed and SLPEN = 1, the
LCD module will immediately cease all functions, drive
the outputs to Vss and go into a very low-current mode.
The SLEEP instruction should only be executed after
the LCD module has been disabled and the current
cycle completed, thus ensuring that there are no DC
voltages on the glass. To disable the LCD module,
clear the LCDEN bit. The LCD module will complete the
disabling process after the current frame, clear the
LCDA bit and optionally cause an interrupt.
The steps required to properly enter Sleep with the
LCD disabled are:
• Clear LCDEN
• Wait for LCDA = 0 either by polling or by interrupt
• Execute SLEEP
If SLPEN = 0 and SLEEP is executed while the LCD
module clock source is F
OSC/4, then the LCD module
will halt with the pin driving the last LCD voltage pat-
tern. Prolonged exposure to a fixed LCD voltage pat-
tern will cause damage to the LCD glass. To prevent
LCD glass damage, either perform the proper LCD
module shutdown prior to Sleep, or change the LCD
module clock to allow the LCD module to continue
operation during Sleep.
If a SLEEP instruction is executed and SLPEN = 0 and
the LCD module clock is either T1OSC or LFINTOSC,
the module will continue to display the current contents
of the LCDDATA registers. While in Sleep, the LCD
data cannot be changed. If the LCDIE bit is set, the
device will wake from Sleep on the next LCD frame
boundary. The LCD module current consumption will
not decrease in this mode; however, the overall device
power consumption will be lower due to the shutdown
of the CPU and other peripherals.
Table 19-8 shows the status of the LCD module during
a Sleep while using each of the three available clock
sources.
If a SLEEP instruction is executed and SLPEN = 0, the
module will continue to display the current contents of
the LCDDATA registers. To allow the module to
continue operation while in Sleep, the clock source
must be either the LFINTOSC or T1OSC external
oscillator. While in Sleep, the LCD data cannot be
changed. The LCD module current consumption will
not decrease in this mode; however, the overall
consumption of the device will be lower due to shut
down of the core and other peripheral functions.
Table 19-8 shows the status of the LCD module during
Sleep while using each of the three available clock
sources:
TABLE 19-8: LCD MODULE STATUS
DURING SLEEP
If LCD interrupts are being generated (Type-B wave-
form with a Multiplex mode not static) and LCDIE = 1,
the device will awaken from Sleep on the next frame
boundary.
Note: When the LCDEN bit is cleared, the LCD
module will be disabled at the completion
of frame. At this time, the port pins will
revert to digital functionality. To minimize
power consumption due to floating digital
inputs, the LCD pins should be driven low
using the PORT and TRIS registers.
Clock Source SLPEN
Operational
During Sleep
T1OSC
0 Yes
1 No
LFINTOSC
0 Yes
1 No
F
OSC/4
0 No
1 No
Note: The LFINTOSC or external T1OSC
oscillator must be used to operate the
LCD module during Sleep.