Datasheet

PIC16HV540
DS40197B-page 8 Preliminary  2000 Microchip Technology Inc.
FIGURE 3-1: PIC16HV540 BLOCK DIAGRAM
VREG
3V/5V
Regulator
V
DD
BOD
PC
(PIN CHANGE)
FILTER
RB7
PCWU
4
RB<3:0>
RL/SL
BODL/BODEN
SWDTEN (OPTION2 REGISTER)
OSC1 OSC2 MCLR
CONFIGURATION WORD
EPROM
512 X 12
INSTRUCTION
REGISTER
INSTRUCTION
DECODER
PC
9-11
9-11
12
12
9
8
DIRECT ADDRESS
WDT
TIME
OUT
STACK 1
STACK 2
STACK 3
STACK 4
HIGH VOLTAGE
TRANSLATION
RL/SL
T0CKI
PIN
“DISABLE”
“OSC
SELECT”
2
WATCHDOG
TIMER
“CODE
PROTECT”
8
OSCILLATOR/
TIMING &
CONTROL
“SLEEP”
CLKOUT
WDT/TMR0
PRESCALER
6
6
“OPTION”
FROM W
FROM W
GENERAL
PURPOSE
REGISTER
FILE
(SRAM)
25 Bytes
“TRIS 7”
DIRECT RAM
ADDRESS
5
OPTION2
OPTION REG
5-7
8
FSR
TMR0
DATA BUS
8
8
8
8
8
4
4
4
FROM W
FROM W
“TRIS 6”
PORTB
PORTA
TRISB
TRISA
RB<7:0>
RA<3:0>
VIO
3V/5V
Regulator
“TRIS 5”
ALU
STATUS
W
LITERALS