Datasheet

 2000 Microchip Technology Inc. Preliminary DS40197B-page 37
PIC16HV540
FIGURE 7-8: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO VDD)
FIGURE 7-9: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIED TO VDD): FAST VDD RISE TIME
FIGURE 7-10: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIED TO VDD): SLOW VDD RISE TIME
VDD
MCLR
INTERNAL POR
DRT TIME-OUT
INTERNAL RESET
TDRT
VDD
MCLR
INTERNAL POR
DRT TIME-OUT
INTERNAL RESET
TDRT
VDD
MCLR
INTERNAL POR
DRT TIME-OUT
INTERNAL RESET
TDRT
V1
When VDD rises slowly, the TDRT time-out expires long before VDD has reached its final value. In
this example, the chip will reset properly if, and only if, V1
≥ VDD min.