Datasheet

PIC16HV540
DS40197B-page 22 Preliminary  2000 Microchip Technology Inc.
TABLE 5-1: SUMMARY OF PORT REGISTERS
5.5 I/O Programming Considerations
5.5.1 BI-DIRECTIONAL I/O PORTS
Some instructions operate internally as read followed
by write operations. The BCF and BSF instructions, for
example, read the entire port into the CPU, execute the
bit operation and re-write the result. Caution must be
used when these instructions are applied to a port
where one or more pins are used as input/outputs. For
example, a BSF operation on bit5 of PORTB will cause
all eight bits of PORTB to be read into the CPU, bit5 to
be set and the PORTB value to be written to the output
latches. If another bit of PORTB is used as a bi-direc-
tional I/O pin (say bit0) and it is defined as an input at
this time, the input signal present on the pin itself would
be read into the CPU and rewritten to the data latch of
this particular pin, overwriting the previous content. As
long as the pin stays in the input mode, no problem
occurs. However, if bit0 is switched into output mode
later on, the content of the data latch may now be
unknown.
Example 5-1 shows the effect of two sequential read-
modify-write instructions (e.g., BCF, BSF, etc.) on an I/
O port.
A pin actively outputting a high or a low should not be
driven from external devices at the same time in order
to change the level on this pin (“wired-or”, “wired-and”).
The resulting high output currents may damage the
chip.
EXAMPLE 5-1: READ-MODIFY-WRITE
INSTRUCTIONS ON AN
I/O PORT
;Initial PORT Settings
; PORTB<7:4> Inputs
; PORTB<3:0> Outputs
;PORTB<7:6> have external pull-ups and are
;not connected to other circuitry
;
; PORT latch PORT pins
; ---------- ----------
BCF PORTB, 7 ;01pp pppp 11pp pppp
BCF PORTB, 6 ;10pp pppp 11pp pppp
MOVLW 03Fh ;
TRIS PORTB ;10pp pppp 10pp pppp
;
;Note that the user may have expected the pin
;values to be 00pp pppp. The 2nd BCF caused
;RB7 to be latched as the pin value (High).
5.5.2 SUCCESSIVE OPERATIONS ON I/O
PORTS
The actual write to an I/O port happens at the end of an
instruction cycle, whereas for reading, the data must be
valid at the beginning of the instruction cycle
(Figure 5-5). Therefore, care must be exercised if a
write followed by a read operation is carried out on the
same I/O port. The sequence of instructions should
allow the pin voltage to stabilize (load dependent)
before the next instruction, which causes that file to be
read into the CPU, is executed. Otherwise, the previous
state of that pin may be read into the CPU rather than
the new state. When in doubt, it is better to separate
these instructions with a NOP or another instruction not
accessing this I/O port.
Address
Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
Power-On
Reset
Value on
MCLR and
WDT Reset
Value on
Wake-up on
Pin Change
Value on
Brown-Out
Reset
N/A TRIS I/O control registers (TRISA, TRISB) 1111 1111 1111 1111 1111 1111 1111 1111
05h PORTA
— — — — RA3 RA2 RA1 RA0
---- xxxx ---- uuuu ---- uuuu ---- xxxx
06h PORTB
RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0
xxxx xxxx uuuu uuuu uuuu uuuu xxxx xxxx
03h STATUS
PCWUF
PA 1 PA 0 TO PD Z DC C
100x xxxx 100q quuu 000u uuuu x00x xxxx
N/A OPTION2
— — PCWU SWDTEN RL SL BODL BODEN
--11 1111 --uu uuuu --uu uuuu --xx xxxx
Legend: Shaded boxes = unimplemented, read as ‘0’, —= unimplemented, read as '0', x = unknown, u = unchanged.