© 2007 Microchip Technology Inc. DS41250F-page 79
PIC16F913/914/916/917/946
FIGURE 3-28: BLOCK DIAGRAM OF RE<7:4> (PIC16F946 ONLY)
Data Bus
WR PORTE
WR TRISE
RD PORTE
SEG<27:24>
Schmitt
Trigger
I/O Pin
Data Latch
TRIS Latch
Q
D
Q
CK
Q
D
Q
CK
Analog Mode or
RD TRISE
AN<7:5>
SEG<27:24> and LCDEN
SEG<27:24> and LCDEN
VDD
VSS
