Datasheet

PIC16F913/914/916/917/946
DS41250F-page 78 © 2007 Microchip Technology Inc.
FIGURE 3-26: BLOCK DIAGRAM OF RE<2:0> (PIC16F914/917 AND PIC16F946 ONLY)
FIGURE 3-27: BLOCK DIAGRAM OF RE3
Data Bus
WR PORTE
WR TRISE
RD PORTE
SEG<23:21>
Schmitt
Trigger
I/O Pin
Data Latch
TRIS Latch
Q
D
Q
CK
Q
D
Q
CK
Analog Mode or
RD TRISE
AN<7:5>
SEG<23:21> and LCDEN
SEG<23:21> and LCDEN
VDD
VSS
and LCDEN
HV Detect
MCLR
Filter
Input Pin
RD PORTE
MCLR circuit
Programming mode
Data Bus
RD TRISE
M
CLRE
HV
Buffer
Schmitt Trigger
HV
Buffer
Schmitt Trigger
VSS
VSS