Datasheet

PIC16F913/914/916/917/946
DS41250F-page 76 © 2007 Microchip Technology Inc.
3.7
PORTE and TRISE Registers
PORTE is a 1-bit, 4-bit or 8-bit port with Schmitt Trigger
input buffers. RE<7:4, 2:0> are individually configured as
inputs or outputs and RE3 is only available as an input if
MCLRE is ‘0’ in Configuration Word (Register 16-1).
RE<2:0> are only available on the PIC16F914/917 and
PIC16F946. RE<7:4> are only available on the
PIC16F946.
EXAMPLE 3-5: INITIALIZING PORTE
BANKSEL PORTE ;
CLRF PORTE ;Init PORTE
BANKSEL TRISE ;
MOVLW 0Fh ;Set RE<3:0> as inputs
MOVWF TRISE ;
CLRF ANSEL ;Make RE<2:0> as I/O’s
REGISTER 3-12: PORTE: PORTE REGISTER
R/W-x R/W-x R/W-x R/W-x R-x R/W-x R/W-x R/W-x
RE7
(1,3)
RE6
(1,3)
RE5
(1,3)
RE4
(1,3)
RE3 RE2
(2,4)
RE1
(2,4)
RE0
(2,4)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 RE<7:0>: PORTE I/O Pin bits
1 = Port pin is >V
IH min.
0 = Port pin is <V
IL max.
Note 1: PIC16F946 only.
2: PIC16F914/917 and PIC16F946 only.
3: PIC16F91X, Read as ‘0’.
4: PIC16F913/916, Read as ‘0’.
REGISTER 3-13: TRISE: PORTE TRI-STATE REGISTER
R/W-1 R/W-1 R/W-1 R/W-1 R-1 R/W-1 R/W-1 R/W-1
TRISE7
(1,3)
TRISE6
(1,3)
TRISE5
(1,3)
TRISE4
(1,3)
TRISE3 TRISE2
(2,4)
TRISE1
(2,4)
TRISE0
(2,4)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 TRISE<7:0>: PORTE Tri-State Control bits
1 = PORTE pin configured as an input (tri-stated)
0 = PORTE pin configured as an output
Note 1: PIC16F946 only.
2: PIC16F914/917 and PIC16F946 only.
3: PIC16F91X, Read as ‘0’.
4: PIC16F913/916, Read as ‘0’.