Datasheet

PIC16F913/914/916/917/946
DS41250F-page 74 © 2007 Microchip Technology Inc.
FIGURE 3-24: BLOCK DIAGRAM OF RD2
FIGURE 3-25: BLOCK DIAGRAM OF RD<7:3>
Data Bus
WR PORTD
WR TRISD
RD PORTD
CCP2 Input
0
1
(PORT/CCP2 Select) and CCPMX
CCP2 Data Out
I/O Pin
Data Latch
TRIS Latch
Q
D
Q
CK
Q
D
Q
CK
RD TRISD
VDD
VSS
Schmitt
Trigger
Data Bus
WR PORTD
WR TRISD
RD PORTD
SEG<20:16>
I/O Pin
Data Latch
TRIS Latch
Q
D
Q
CK
Q
D
Q
CK
SE<20:16> and LCDEN
RD TRISD
Schmitt
Trigger
SE<20:16> and LCDEN
VDD
VSS