Datasheet

© 2007 Microchip Technology Inc. DS41250F-page 31
PIC16F913/914/916/917/946
TABLE 2-4: PIC16F91X/946 SPECIAL FUNCTION REGISTERS SUMMARY BANK 3
Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Page
Bank 3
180h INDF Addressing this location uses contents of FSR to address data memory (not a physical
register)
xxxx xxxx 41,226
181h OPTION_REG RBPU
INTEDG T0CS T0SE PSA PS2 PS1 PS0
1111 1111 33,227
182h PCL Program Counter (PC) Least Significant Byte
0000 0000 40,226
183h STATUS IRP RP1 RP0 TO
PD ZDCC
0001 1xxx 32,226
184h FSR Indirect Data Memory Address Pointer
xxxx xxxx 41,226
185h TRISF
(3)
TRISF7 TRISF6 TRISF5 TRISF4 TRISF3 TRISF2 TRISF1 TRISF0 1111 1111 81,228
186h TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 1111 1111 54,227
187h TRISG
(3)
— — TRISG5 TRISG4 TRISG3 TRISG2 TRISG1 TRISG0 --11 1111 84,228
188h PORTF
(3)
RF7 RF6 RF5 RF4 RF3 RF2 RF1 RF0 xxxx xxxx 81,228
189h PORTG
(3)
— — RG5 RG4 RG3 RG2 RG1 RG0 --xx xxxx 84,228
18Ah PCLATH
— — — Write Buffer for the upper 5 bits of the Program Counter
---0 0000 40,226
18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF
0000 000x 34,226
18Ch EECON1 EEPGD
— — — WRERR WREN WR RD 0--- x000 189,229
18Dh EECON2 EEPROM Control Register 2 (not a physical register) ---- ---- 187
18Eh — Reserved — —
18Fh — Reserved — —
190h LCDDATA12
(3)
SEG31
COM0
SEG30
COM0
SEG29
COM0
SEG28
COM0
SEG27
COM0
SEG26
COM0
SEG25
COM0
SEG24
COM0
xxxx xxxx
147,228
191h LCDDATA13
(3)
SEG39
COM0
SEG38
COM0
SEG37
COM0
SEG36
COM0
SEG35
COM0
SEG34
COM0
SE33
COM0
SEG32
COM0
xxxx xxxx
147,228
192h LCDDATA14
(3)
— — — — — —SEG41
COM0
SEG40
COM0
---- --xx
147,228
193h LCDDATA15
(3)
SEG31
COM1
SEG30
COM1
SEG29
COM1
SEG28
COM1
SEG27
COM1
SEG26
COM1
SEG25
COM1
SEG24
COM1
xxxx xxxx
147,228
194h LCDDATA16
(3)
SEG39
COM1
SEG38
COM1
SEG37
COM1
SEG36
COM1
SEG35
COM1
SEG34
COM1
SEG33
COM1
SEG32
COM1
xxxx xxxx
147,228
195h LCDDATA17
(3)
— — — — — —SEG41
COM1
SEG40
COM1
---- --xx
147,228
196h LCDDATA18
(3)
SEG31
COM2
SEG30
COM2
SEG29
COM2
SEG28
COM2
SEG27
COM2
SEG26
COM2
SEG25
COM2
SEG24
COM2
xxxx xxxx
147,228
197h LCDDATA19
(3)
SEG39
COM2
SEG38
COM2
SEG37
COM2
SEG36
COM2
SEG35
COM2
SEG34
COM2
SEG33
COM2
SEG32
COM2
xxxx xxxx
147,228
198h LCDDATA20
(3)
— — — — — —SEG41
COM2
SEG40
COM2
---- --xx
147,228
199h LCDDATA21
(3)
SEG31
COM3
SEG30
COM3
SEG29
COM3
SEG28
COM3
SEG27
COM3
SEG26
COM3
SEG25
COM3
SEG24
COM3
xxxx xxxx
147,228
19Ah LCDDATA22
(3)
SEG39
COM3
SEG38
COM3
SEG37
COM3
SEG36
COM3
SEG35
COM3
SEG34
COM3
SEG33
COM3
SEG32
COM3
xxxx xxxx
147,228
19Bh LCDDATA23
(3)
— — — — — —SEG41
COM3
SEG40
COM3
---- --xx
147,228
19Ch LCDSE3
(2, 3)
SE31 SE30 SE29 SE28 SE27 SE26 SE25 SE24 0000 0000 147,229
19Dh LCDSE4
(2, 3)
SE39 SE38 SE37 SE36 SE35 SE34 SE33 SE32 0000 0000 147,229
19Eh LCDSE5
(2, 3)
— — — — — — SE41 SE40 ---- --00 147,229
19Fh — Unimplemented — —
Legend: – = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
Note 1: Other (non Power-up) Resets include MCLR
Reset and Watchdog Timer Reset during normal operation.
2: This register is only initialized by a POR or BOR reset and is unchanged by other Resets.
3: PIC16F946 only.