Datasheet

© 2007 Microchip Technology Inc. DS41250F-page 323
PIC16F917/916/914/913
Registers..................................................................... 62
TRISC Register................................................................... 62
TRISD
Registers..................................................................... 71
TRISD Register................................................................... 71
TRISE
Registers..................................................................... 76
TRISE Register ................................................................... 76
TRISF
Registers..................................................................... 81
TRISF Register ................................................................... 81
TRISG
Registers..................................................................... 84
TRISG Register................................................................... 84
Two-Speed Clock Start-up Mode ........................................ 95
TXREG.............................................................................. 123
TXSTA Register ................................................................ 130
BRGH Bit .................................................................. 132
U
UA ..................................................................................... 194
Update Address bit, UA .................................................... 194
USART
Synchronous Master Mode
Requirements, Synchronous Receive .............. 275
Requirements, Synchronous Transmission ...... 275
Timing Diagram, Synchronous Receive ........... 275
Timing Diagram, Synchronous Transmission ... 275
V
Voltage Reference. See Comparator Voltage
Reference (CV
REF)
Voltage References
Associated registers.................................................. 119
V
REF. SEE ADC Reference Voltage
W
Wake-up Using Interrupts ................................................. 236
Watchdog Timer (WDT) .................................................... 234
Associated Registers ................................................ 235
Clock Source............................................................. 234
Modes ....................................................................... 234
Period........................................................................ 234
Specifications............................................................ 269
WCOL bit .......................................................................... 195
WDTCON Register ........................................................... 235
WPUB Register................................................................... 55
Write Collision Detect bit (WCOL)..................................... 195
WWW Address.................................................................. 325
WWW, On-Line Support ..................................................... 13