Datasheet

© 2007 Microchip Technology Inc. DS41250F-page 275
PIC16F913/914/916/917/946
FIGURE 19-11: USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
TABLE 19-10: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS
FIGURE 19-12: USART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
TABLE 19-11: USART SYNCHRONOUS RECEIVE REQUIREMENTS
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C ≤ T
A ≤ +125°C
Param.
No.
Symbol Characteristic Min. Max. Units Conditions
120 T
CKH2DT
V
SYNC XMIT (M
aster and Slave)
Clock high to data-out valid
3.0-5.5V — 80 ns
2.0-5.5V — 100 ns
121 TCKRF Clock out rise time and fall time
(Master mode)
3.0-5.5V — 45 ns
2.0-5.5V — 50 ns
122 TDTRF Data-out rise time and fall time 3.0-5.5V — 45 ns
2.0-5.5V — 50 ns
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C ≤ T
A ≤ +125°C
Param.
No.
Symbol Characteristic Min. Max. Units Conditions
125 T
DTV2CKL SYNC RCV (Master and Slave)
Data-hold before CK ↓ (DT hold time) 10 — ns
126 T
CKL2DTL Data-hold after CK ↓ (DT hold time) 15 — ns
Note: Refer to Figure 19-3 for load conditions.
121
121
120
122
RC6/TX/CK
RC7/RX/DT/
SCK/SCL/SEG9
SDI/SDA/SEG8
Note: Refer to Figure 19-3 for load conditions.
125
126
RC6/TX/CK
SCK/SCL/SEG9
RC7/RX/DT/
SDI/SDA/SEG8