Datasheet

© 2007 Microchip Technology Inc. DS41250F-page 17
PIC16F913/914/916/917/946
FIGURE 1-3: PIC16F946 BLOCK DIAGRAM
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RB7
Flash
Program
Memory
13
Data Bus
8
14
Program
Bus
Instruction Reg
Program Counter
RAM
File
Registers
Direct Addr
7
RAM Addr
9
Addr MUX
Indirect
Addr
FSR Reg
STATUS Reg
MUX
ALU
W Reg
Instruction
Decode and
Control
Timing
Generation
OSC1/CLKIN
OSC2/CLKOUT
PORTA
8
8
8
3
8-Level Stack (13-bit)
336 x 8 bytes
8K x 14
VSS
RA0
RA1
RA2
RA3
RA4
RA5
RA6
RA7
Configuration
Internal
Oscillator
V
DD
Block
Program Memory Read
PORTC
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
PORTD
(PMR)
PORTB
PLVD
LCD
Data EEPROM
256 bytes
Comparators
SSP
CCP1 CCP2
Timer0
Timer1 Timer2 10-bit A/D
Addressable
USART
PORTE
PORTF
PORTG
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7
RE0
RE1
RE2
RE3/MCLR
RE4
RE5
RE6
RE7
RF0
RF1
RF2
RF3
RF4
RF5
RF6
RF7
RG0
RG1
RG2
RG3
RG4
RG5
INT
AVSSAVDD