Datasheet

© 2007 Microchip Technology Inc. DS41250F-page 173
PIC16F913/914/916/917/946
TABLE 11-1: REGISTERS ASSOCIATED WITH PROGRAMMABLE LOW-VOLTAGE DETECT
REGISTER 11-1: LVDCON: LOW-VOLTAGE DETECT CONTROL REGISTER
U-0 U-0 R-0 R/W-0 U-0 R/W-1 R/W-0 R/W-0
— — IRVST
(1)
LVDEN — LVDL2 LVDL1 LVDL0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0’
bit 5 IRVST: Internal Reference Voltage Stable Status Flag bit
(1)
1 = Indicates that the PLVD is stable and PLVD interrupt is reliable
0 = Indicates that the PLVD is not stable and PLVD interrupt must not be enabled
bit 4 LVDEN: Low-Voltage Detect Module Enable bit
1 = Enables PLVD Module, powers up PLVD circuit and supporting reference circuitry
0 = Disables PLVD Module, powers down PLVD circuit and supporting reference circuitry
bit 3 Unimplemented: Read as ‘0’
bit 2-0 LVDL<2:0>: Low-Voltage Detection Level bits (nominal values)
(3)
111 = 4.5V
110 = 4.2V
101 = 4.0V
100 = 2.3V (default)
011 = 2.2V
010 = 2.1V
001 = 2.0V
(2)
000 = Reserved
Note 1: The IRVST bit is usable only when the HFINTOSC is running.
2: Not tested and below minimum operating conditions.
3: See Section 19.0 “Electrical Specifications”.
NameBit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
Value on
POR, BOR
Value on
all other
Resets
INTCON GIE PEIE
T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000x
LVDCON
— — IRVST LVDEN — LVDL2 LVDL1 LVDL0 --00 -100 --00 -100
PIE2
OSFIE C2IE C1IE LCDIE —LVDIE— CCP2IE
0000 -0-0 0000 -0-0
PIR2
OSFIF C2IF C1IF LCDIF —LVDIF— CCP2IF
0000 -0-0 0000 -0-0
Legend: x = unknown, - = unimplemented read as ‘0’. Shaded cells are not used by the PLVD module.