Datasheet
2007-2013 Microchip Technology Inc. DS80000302H-page 13
PIC16F88X
11. Module: MSSP (SPI Master Mode)
When the MSSP module is configured as a SPI
master with CKP set, (SPI clock idles high)
disabling the module by clearing the SSPEN bit
will cause the clock line to be driven low for 2 T
OSC
before the setting of the RC3 output in the PORTC
register takes effect.
Similarly on enabling the module. There is a 1
T
OSC period where the clock line will be driven low
before the CKP bit takes effect and the line is
driven high.
Work around
A pull-up resistor on the SCK line allows the pin to
be configured as high-impedance during disabling/
enabling the module and the line to be pulled high
by the resistor.
The TRISC3 bit should be set before disabling or
enabling the module to tristate the pin, and then
cleared before transmission.
Affected Silicon Revisions
PIC16F882
PIC16F883/PIC16F884
PIC16F886/PIC16F887
12. Module: Capture Compare PWM (CCP)
With the ECCP configured for PWM Half-Bridge
mode and a dead-band delay greater than or equal
to the PWM duty cycle, unpredictable waveforms
will result.
Work around
Make sure the dead-band delay is always less
than the PWM duty cycle.
Affected Silicon Revisions
PIC16F882
PIC16F883/PIC16F884
PIC16F886/PIC16F887
13. Module: ICSP
If the supply voltage (VDD) applied to the device is
below 2.7V, the device can misread memory
locations while performing an In-Circuit Serial
Programming™ (ICSP™) read or verify command
of the Program Flash Memory (PFM) or the Data
EEPROM. This errata applies to both the High-
Voltage ICSP and the Low-Voltage ICSP modes of
the device, as described in the “PIC16F88X
Memory Programming Specification” (DS41287).
This low-voltage memory misread issue is limited
to only the ICSP hardware interface module on the
device, which is only used during device
programming. In Normal user mode, the device
will operate properly down to the specified V
DD
supply limits, as documented in the device data
sheet (“PIC16F882/883/884/886/887, 28/40/44-
Pin Flash-Based, 8-Bit CMOS Microcontrollers)’’’
(DS41291).
Work around
Maintain a minimum VDD voltage setting of 2.7V or
above when performing an ICSP read or verify
command during programming of the PFM or Data
EEPROM Memory.
PIC16F886/PIC16F887
A0
X
A0
X
A2
X
A0
X
A0
X
A2
X
A2
X