Datasheet

© 2009 Microchip Technology Inc. DS41291F-page 321
PIC16F882/883/884/886/887
Bus Collision During a Stop Condition......................207
Bus Collision for Transmit and Acknowledge............ 203
CLKOUT and I/O.......................................................257
Clock Timing ............................................................. 255
Comparator Output ..................................................... 83
Enhanced Capture/Compare/PWM (ECCP) ............. 261
EUSART Synchronous Receive (Master/Slave) ....... 266
EUSART Synchronous Transmission
(Master/Slave) .................................................. 266
Fail-Safe Clock Monitor (FSCM)................................. 72
Full-Bridge PWM Output........................................... 137
Half-Bridge PWM Output .................................. 135, 144
I
2
C Bus Data............................................................. 270
I
2
C Bus Start/Stop Bits.............................................. 269
I
2
C Master Mode First Start Bit Timing ..................... 196
I
2
C Master Mode Reception Timing.......................... 200
I
2
C Master Mode Transmission Timing..................... 199
I
2
C Module
Bus Collision
Transmit Timing........................................203
INT Pin Interrupt........................................................ 222
Internal Oscillator Switch Timing.................................68
Master Mode Transmit Clock Arbitration................... 202
PWM Auto-shutdown
Auto-restart Enabled......................................... 143
Firmware Restart ..............................................143
PWM Direction Change ............................................138
PWM Direction Change at Near 100% Duty Cycle ... 139
PWM Output (Active-High)........................................ 133
PWM Output (Active-Low) ........................................ 134
Repeat Start Condition.............................................. 197
Reset, WDT, OST and Power-up Timer ................... 258
Send Break Character Sequence ............................. 170
Slave Synchronization .............................................. 186
SPI Master Mode (CKE = 1, SMP = 1) .....................267
SPI Mode Timing (Master Mode) SPI Mode
Master Mode Timing Diagram .......................... 185
SPI Mode Timing (Slave Mode with CKE = 0).......... 187
SPI Mode Timing (Slave Mode with CKE = 1).......... 187
SPI Slave Mode (CKE = 0) ....................................... 268
SPI Slave Mode (CKE = 1) ....................................... 268
Stop Condition Receive or Transmit ......................... 202
Synchronous Reception (Master Mode, SREN) ....... 174
Synchronous Transmission....................................... 172
Synchronous Transmission (Through TXEN) ........... 172
Time-out Sequence
Case 1 .............................................................. 216
Case 2 .............................................................. 216
Case 3 .............................................................. 216
Timer0 and Timer1 External Clock ........................... 260
Timer1 Incrementing Edge..........................................78
Two Speed Start-up.................................................... 70
Wake-up from Interrupt.............................................227
Timing Parameter Symbology...........................................254
Timing Requirements
I
2
C Bus Data............................................................. 271
I2C Bus Start/Stop Bits............................................. 270
SPI Mode ..................................................................269
TRISA .................................................................................39
TRISA Register................................................................... 39
TRISB .................................................................................47
TRISB Register................................................................... 48
TRISC ................................................................................. 53
TRISC Register................................................................... 53
TRISD ................................................................................. 57
TRISD Register................................................................... 57
TRISE ................................................................................. 59
TRISE Register................................................................... 59
Two-Speed Clock Start-up Mode........................................ 69
TXREG ............................................................................. 153
TXSTA Register................................................................ 160
BRGH Bit.................................................................. 163
U
Ultra Low-Power Wake-up................................ 16, 18, 40, 41
V
Voltage Reference (VR)
Specifications ........................................................... 262
Voltage Reference. See Comparator
Voltage Reference (CV
REF)
Voltage References
Associated Registers.................................................. 97
VP6 Stabilization ........................................................ 94
V
REF. SEE ADC Reference Voltage
W
Wake-up on Break............................................................ 168
Wake-up Using Interrupts................................................. 226
Watchdog Timer (WDT).................................................... 224
Associated Registers................................................ 225
Clock Source ............................................................ 224
Modes....................................................................... 224
Period ....................................................................... 224
Specifications ........................................................... 259
Waveform for Slave Mode General Call
Address Sequence ................................................... 192
WCOL............................................................... 196, 198, 201
WCOL Status Flag............................................ 196, 198, 201
WDTCON Register ........................................................... 225
WPUB Register................................................................... 49
WWW Address ................................................................. 323
WWW, On-Line Support ..................................................... 12