Datasheet

PIC16F882/883/884/886/887
DS41291G-page 76  2006-2012 Microchip Technology Inc.
FIGURE 4-9: FSCM TIMING DIAGRAM
TABLE 4-2: SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES
TABLE 4-3: SUMMARY OF CONFIGURATION WORD ASSOCIATED WITH CLOCK SOURCES
OSCFIF
System
Clock
Output
Sample Clock
Failure
Detected
Oscillator
Failure
Note: The system clock is normally at a much higher frequency than the sample clock. The relative frequencies in
this example have been chosen for clarity.
(Q)
Tes t
Test Test
Clock Monitor Output
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
OSCCON — IRCF2 IRCF1 IRCF0 OSTS HTS LTS SCS 66
OSCTUNE
— — — TUN4 TUN3 TUN2 TUN1 TUN0 70
PIE2 OSFIE C2IE C1IE EEIE BCLIE ULPWUIE — CCP2IE 35
PIR2
OSFIF C2IF C1IF EEIF BCLIF ULPWUIF — CCP2IF 37
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by
oscillators.
Name Bits Bit -/7 Bit -/6 Bit 13/5 Bit 12/4 Bit 11/3 Bit 10/2 Bit 9/1 Bit 8/0
Register
on Page
CONFIG1
(1)
13:8
— —
DEBUG LVP FCMEN IESO BOREN 1 BOREN0 214
7:0 CPD CP MCLRE PWRTE WDTE FOSC 2 FOSC 1 FOSC 0
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by
oscillators.
Note 1: See Configuration Word Register 1 (Register 14-1) for operation of all register bits.