Datasheet

PIC16F882/883/884/886/887
DS41291G-page 48  2006-2012 Microchip Technology Inc.
3.2.3.8 RA7/OSC1/CLKIN
Figure 3-8 shows the diagram for this pin. This pin is
configurable to function as one of the following:
• a general purpose I/O
• a crystal/resonator connection
• a clock input
FIGURE 3-8: BLOCK DIAGRAM OF RA7
TABLE 3-1: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
I/O Pin
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
Data Bus
RD
PORTA
WR
PORTA
WR
TRISA
RD
TRISA
INTOSC
Mode
OSC1
CLKIN
Circuit
Oscillator
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
ADCON0
ADCS1 ADCS0 CHS3 CHS2 CHS1 CHS0
GO/DONE
ADON 108
ANSEL
ANS7 ANS6 ANS5 ANS4 ANS3 ANS2 ANS1 ANS0 42
CM1CON0 C1ON C1OUT C1OE C1POL — C1R C1CH1 C1CH0 93
CM2CON0
C2ON C2OUT C2OE C2POL — C2R C2CH1 C2CH0 94
CM2CON1 MC1OUT MC2OUT C1RSEL C2RSEL — — T1GSS C2SYNC 96
PCON
— —ULPWUESBOREN— —PORBOR 38
OPTION_REG RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 32
PORTA RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0 41
SSPCON
WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 185
TRISA TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 41
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTA.