Datasheet

PIC16F882/883/884/886/887
DS41291G-page 270  2006-2012 Microchip Technology Inc.
FIGURE 17-12: EUSART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
TABLE 17-12: EUSART SYNCHRONOUS TRANSMISSION REQUIREMENTS
FIGURE 17-13: EUSART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
TABLE 17-13: EUSART SYNCHRONOUS RECEIVE REQUIREMENTS
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C T
A +125°C
Param.
No.
Symbol Characteristic Min. Max. Units Conditions
120 T
CKH2DT
V
SYNC XMIT (M
aster & Slave)
Clock high to data-out valid
—40ns
121 TCKRF Clock out rise time and fall time (Master mode) — 20 ns
122 T
DTRF Data-out rise time and fall time — 20 ns
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C T
A +125°C
Param.
No.
Symbol Characteristic Min. Max. Units Conditions
125 TDTV2CKL SYNC RCV (Master & Slave)
Data-hold before CK  (DT hold time) 10 — ns
126 TCKL2DTL Data-hold after CK  (DT hold time) 15 — ns
Note: Refer to Figure 17-3 for load conditions.
121
121
120
122
RC6/TX/CK
RC7/RX/DT
pin
pin
Note: Refer to Figure 17-3 for load conditions.
125
126
RC6/TX/CK
RC7/RX/DT
pin
pin