Datasheet

 2006-2012 Microchip Technology Inc. DS41291G-page 221
PIC16F882/883/884/886/887
TABLE 14-4: INITIALIZATION CONDITION FOR REGISTER
Register Address
Power-on
Reset
MCLR
Reset
WDT Reset
Brown-out Reset
(1)
Wake-up from Sleep through
Interrupt
Wake-up from Sleep through
WDT Time-out
W—xxxx xxxx uuuu uuuu uuuu uuuu
INDF 00h/80h/10
0h/180h
xxxx xxxx xxxx xxxx uuuu uuuu
TMR0 01h/101h xxxx xxxx uuuu uuuu uuuu uuuu
PCL 02h/82h/10
2h/182h
0000 0000 0000 0000 PC + 1
(3)
STATUS 03h/83h/10
3h/183h
0001 1xxx 000q quuu
(4)
uuuq quuu
(4)
FSR 04h/84h/10
4h/184h
xxxx xxxx uuuu uuuu uuuu uuuu
PORTA 05h xxxx xxxx 0000 0000 uuuu uuuu
PORTB 06h/106h xxxx xxxx 0000 0000 uuuu uuuu
PORTC 07h xxxx xxxx 0000 0000 uuuu uuuu
PORTD 08h xxxx xxxx 0000 0000 uuuu uuuu
PORTE 09h ---- xxxx ---- 0000 ---- uuuu
PCLATH 0Ah/8Ah/10
Ah/18Ah
---0 0000 ---0 0000 ---u uuuu
INTCON 0Bh/8Bh/10
Bh/18Bh
0000 000x 0000 000u uuuu uuuu
(2)
PIR1 0Ch 0000 0000 0000 0000 uuuu uuuu
(2)
PIR2 0Dh 0000 0000 0000 0000 uuuu uuuu
(2)
TMR1L 0Eh xxxx xxxx uuuu uuuu uuuu uuuu
TMR1H 0Fh xxxx xxxx uuuu uuuu uuuu uuuu
T1CON 10h 0000 0000 uuuu uuuu -uuu uuuu
TMR2 11h 0000 0000 0000 0000 uuuu uuuu
T2CON 12h -000 0000 -000 0000 -uuu uuuu
SSPBUF 13h xxxx xxxx uuuu uuuu uuuu uuuu
SSPCON 14h 0000 0000 0000 0000 uuuu uuuu
CCPR1L 15h xxxx xxxx uuuu uuuu uuuu uuuu
CCPR1H 16h xxxx xxxx uuuu uuuu uuuu uuuu
CCP1CON 17h 0000 0000 0000 0000 uuuu uuuu
RCSTA 18h 0000 000x 0000 0000 uuuu uuuu
TXREG 19h 0000 0000 0000 0000 uuuu uuuu
RCREG 1Ah 0000 0000 0000 0000 uuuu uuuu
CCPR2L 1Bh xxxx xxxx uuuu uuuu uuuu uuuu
Legend: u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1: If V
DD goes too low, Power-on Reset will be activated and registers will be affected differently.
2: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt
vector (0004h).
4: See Table 14-5 for Reset value for specific condition.
5: If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.
6: Accessible only when SSPCON register bits SSPM<3:0> = 1001.